-- Master the ASlC design process and key implementation technologies: PLDs, FPGAs, gate arrays, and standard cells.
-- New! CD-ROM contains the book's VHDL models, model test benches, and homework solutions.
This is an exceptionally clear, thorough, and up-to-date introduction to today's leading approach to hardware design: synthesis using a hardware description language and today's leading synthesis tools. The book begins with a unified explanation of the VHDL language and its key constructs. Armstrong and Gray introduce the modeling process step-by-step, using many examples at varying levels of abstraction, and demonstrating techniques designed to maximize both simulation efficiency and compatibility with synthesis tools. The book introduces the ASIC design process and its key implementation technologies, including PLDs, gate arrays, FPGAs (using Xilinx tools) and standard cells (using Synopsys tools). Readers will fully understand how VHDL is integrated into the design flow, from executable specifications at the algorithmic level through implementations at the gate or cell level suitable for use in custom or programmable integrated circuit chips. Extensive new coverage includes multilevel modeling; design with standard parts and ASICs, data and control unit design, and modeling for synthesis. Review problems are included in each chapter, and over 300 references are provided. For all electrical engineers, hardware and software designers who need to program with VHDL.